The PCIe bus is now heavily used to interconnect chips in computers/embedded devices. Tools to interact with PCIe can be very expensive (>$50k) and often limited when doing security researchs. The Screamer M.2 aims to offer an alternative at a reasonable price.
R04 (Active): Screamer M.2 USB-C (R04) brings USB-C 3.1 connectivity to our successful Screamer M.2 board while keeping its M.2 form factor and PCIe x4 connectivity.
R03 (Discontinued): Screamer M.2 (R03) replaces PCIe Screamer R02 with an M.2 form factor and PCIe x4 connectivity.
R02 (Discontinued): PCIe Screamer with rerouted PCIe lanes for better signal stability.
R01 (Discontinued): PCIe Screamer first version in PCIe x1.
FPGA Chipset: Xilinx 7 Series XC7A35T
USB Chipset: USB 3.0 FTDI FT601
USB Connector (R04 Only): USB Type-C 3.1 Gen 1
USB Connector (R03 Only): USB Type-A 3.0
M.2 Connector: M.2 Key M (PCIe)
PCIe Bandwidth: PCIe x4 Gen 2.0: 5GT/s
System Clock: Frequency: 100 MHz
User Interfaces: 2 x LED (Green)
Input Voltage: 3.3V supplied from PCIe/M.2
GPIO (Testpoints): 2 pins + GND
JTAG: 6 pins JTAG connector for FPGA programming
Flash: 256Mb SPI Flash for FPGA self-configuration
Dimensions: M.2 2280: 22 mm x 80 mm
PCILeech uses PCIe hardware devices to read and write target system memory.This is achieved by using DMA over PCIe.No drivers are needed on the target system.
- The Screamer M.2 board comes pre-flashed with the PCILeech gateware.
R04: Pre-flashed with PCILeech [v4.3,0100]
R03: Pre-flashed with PCILeech [v4.1,0100]
Our JtagSerial cable is required to reprogram the Screamer M.2 with another gateware or update PCILeech to newer versions.
PCIeInjector: (Example gateware)¶
A example design built with Migen and LiteX that allows:- Redirecting PCIe TLP requests to the Host, using the Host to analyze/generate the TLP completion and sending it to the PCIe bus.- Generating PCIe TLP requests from the Host and redirecting the TLP completions to the Host.