Screamer M.2

The PCIe bus is now heavily used to interconnect chips in computers/embedded devices. Tools to interact with PCIe can be very expensive (>$50k) and often limited when doing security researchs. The Screamer M.2 aims to offer an alternative at a reasonable price.

_images/screamer_m2_r04_top_small.jpg

Hardware Revisions

  • R04 (Active): Screamer M.2 USB-C (R04) brings USB-C 3.1 connectivity to our successful Screamer M.2 board while keeping its M.2 form factor and PCIe x4 connectivity.

  • R03 (Discontinued): Screamer M.2 (R03) replaces PCIe Screamer R02 with an M.2 form factor and PCIe x4 connectivity.

  • R02 (Discontinued): PCIe Screamer with rerouted PCIe lanes for better signal stability.

  • R01 (Discontinued): PCIe Screamer first version in PCIe x1.

Quick Specifications

  • FPGA Chipset: Xilinx 7 Series XC7A35T

  • USB Chipset: USB 3.0 FTDI FT601

  • USB Connector (R04 Only): USB Type-C 3.1 Gen 1

  • USB Connector (R03 Only): USB Type-A 3.0

  • M.2 Connector: M.2 Key M (PCIe)

  • PCIe Bandwidth: PCIe x4 Gen 2.0: 5GT/s

  • System Clock: Frequency: 100 MHz

  • User Interfaces: 2 x LED (Green)

  • Input Voltage: 3.3V supplied from PCIe/M.2

  • GPIO (Testpoints): 2 pins + GND

  • JTAG: 6 pins JTAG connector for FPGA programming

  • Flash: 256Mb SPI Flash for FPGA self-configuration

  • Dimensions: M.2 2280: 22 mm x 80 mm

Applications

PCIeInjector: (Example gateware)

A example design built with Migen and LiteX that allows:
- Redirecting PCIe TLP requests to the Host, using the Host to analyze/generate the TLP completion and sending it to the PCIe bus.
- Generating PCIe TLP requests from the Host and redirecting the TLP completions to the Host.